Article by: Cadence Design Systems Inc.
Cadence has expanded its partnership with Arm to accelerate the success of silicon for mobile devices using its digital and verification tools and the new TCS22.
Cadence Design Systems Inc. has expanded its partnership with Arm to accelerate the success of silicon on mobile devices using Cadence digital and authentication tools and the new Arm Total Compute Solutions 2022 (TCS22), including the Arm Cortex-A715 and Cortex-X3 CPUs and the Arm Mali -G715 and Immortalis-G715 GPUs.
Through the partnership, Cadence has delivered comprehensive RTL-to-GDS digital stream Rapid Adoption Kits (RAKs) for 5nm and 7nm nodes to help customers achieve optimized power, performance and area (PPA) goals and improved productivity. In addition, Cadence has validated reference mobile platforms for the Cortex-A715 and Cortex-X3 CPUs and the Mali-G715 and Immortalis-G715 GPUs to initiate customer authentication flows.
The Cadence integrated digital RTL-to-GDS RAKs optimized for SoC development using the latest Arm TCS22 include the Cadence Cerebrus Intelligent Chip Explorer, Innovus Deployment System, Genus Synthesis Solution, Mode DFT Software Solution, Quantus Extraction Solution, Tempus Timing Signoff Solution and ECO Option, Voltus IC Power Integrity Solution, Conformal Equivalence Control and Conformal Low Power.
The digital RAKs provide users of Cortex-A715 and Cortex-X3 CPU and Mali-G715 and Immortalis-G715 GPU with several key features. For example, the Cadence Cerebrus AI-driven flow optimization enables fast and efficient design-specific closure with less engineering effort. Cadence iSpatial technology provides an integrated and predictable implementation flow for the fastest design completion. The RAKs also include an innovative smart hierarchy flow to deliver better run times on large, powerful CPUs. The integrated Tempus ECO digital stream signature technology provides accurate, final design termination based on path-based analysis. Finally, the activity-aware power optimization engine integrated into the Innovus Implementation System and Genus Synthesis Solution significantly reduces dynamic power consumption, enabling customers to achieve low power consumption goals.
Cadence Verification Flow for Arm Total Compute Solutions
The verification flow includes the Cadence Xcelium Logic Simulation Platform, Palladium Z1 and Z2 Enterprise Emulation Platforms, Helium Virtual and Hybrid Platforms, Jasper Formal Verification Platform, vManager Planning and Metrics, VIP and System VIP tools, and content for Arm-based designs.
The Cadence authentication flow enables customers to improve authentication throughput and achieve advanced software debugging for SoCs with the Cortex-A715 and Cortex-X3 CPUs and Mali-G715 and Immortalis-G715 GPUs. In addition, the reference designs for virtual and hybrid platforms include the Arm Fast models to enable early software development and verification using the Cadence Helium and the Palladium and Protium platforms, otherwise known as the dynamic duo.
“With the delivery of Arm TCS22, we are enabling customers to create high-quality, highly efficient and secure products that deliver an optimal user experience for a variety of mobile applications,” said Paul Williamson, vice president and general manager, Client Industry, arm . “By continuing to partner with Cadence, our mutual customers will be able to leverage our latest Armv9 CPUs and the Mali-G715 and Immortalis-G715 GPUs in addition to Cadence digital and authentication streams to accelerate SoCs to market.”
“This latest collaboration with Arm further demonstrates our commitment to empowering designers to create the world’s most advanced mobile designs that deliver the best user experience,” said Dr. Chin-Chi Teng, senior vice president and general manager, Digital & Signoff Group at Cadence . “Arm used the latest Cadence digital and verification flow innovations to develop Arm TCS22, and together we are enabling customers to leverage these latest innovations to achieve optimal power and performance results and accelerate the path to tape-out.”
The Cadence digital flow enables customers to achieve PPA goals, and the full authentication flow improves authentication throughput. Both streams support the Cadence Intelligent System Design strategy, enabling customers to achieve SoC design excellence.