eFPGA LUTs will outperform FPGA LUTs at some point in the near future due to the benefits of reconfigurable logic built into the chip: cost reduction, lower power, and improved performance.
Many systems use FPGAs because they are more efficient than parallel processing processors and can be programmed with application-specific coprocessors or accelerators commonly found in data centers, wireless base stations, and enterprise storage.
The need for improved processing in the cloud is driven by faster search results, driving revenue and energy savings. The size, power, and cost of FPGAs are driving system architects and their design partners to look for a better solution. The solution used is to integrate FPGAs into the main SoC.
Why? Because it saves up to 10x power and costs. The 10X in cost reduction doesn’t even include the savings from inventory reduction and testing when there is an extra chip on the board. By integrating the FPGA, the cost can be reduced from $300 to $20 in additional silicon costs, as well as power.
fig. 1: eFPGA reduces power and cost by as much as 10X.
In Figure 1, we break down the process to assess how to maximize cost and power reduction for a processor + FPGA processing solution. As most chip designers know, packaging is a significant cost of any chip. Integrating the FPGA eliminates packaging costs. Savings can be as much as 40% of the cost of the FPGA chip, which ranges from tens to hundreds of dollars. In an integrated solution, only one chip needs to be packaged, which is already factored into the cost of the main processing SoC. Normally, when pricing chips, everything is marked, including the packaging. FPGAs are no different, so we didn’t include that conservatively.
Then we can remove the SerDes in the FPGA as they are no longer needed as there is no separate FPGA chip. All communication between the eFPGA and the processor subsystem will take place directly within the SoC. Analog I/O devices used in the FPGA chip are no longer present, which can provide major cost savings and even greater power savings. Also, the latency is reduced without the signals having to go through a SerDes on both sides. This can be critical for some applications, such as query and data retrieval, where latency over one fast SerDes can be as high as 20-30 clock cycles. Since the SerDes in the SoC is also not needed, the latency reduction is double!
Every FPGA design has a logic that doesn’t change. But since you have a single FPGA for much of the design, it’s easier to incorporate the entire design as one big blob in a sea of LUTS. SoC integration and eFPGA provide the opportunity to rethink how the FPGA design is partitioned so you can take advantage of the area, power and performance benefits of ASIC ports by placing those fixed logic components in the SoC as wired logic . This can be conservatively estimated at 20% of the silicon surface, but some designs will save more cost and energy.
Technology is getting smaller and this offers the opportunity to lower the total cost of ownership by moving to smaller nodes. Embedded FPGA made with 100% standard cells can be quickly ported to reduce the area, cost and power of the final SoC as shown in the figure. This is at a rate much faster than FPGA providers, which use SRAM memory cells and design completely custom, which can take several years to transition to a new technology node.
Flex Logix offers a hard macro that sits in the lower layers of the metal stack and is compatible with most metal stacks offered in the foundry process. Flex Logix eFPGAs save energy and space with our patented Boundless Radix interconnect. This interconnect results in shorter paths, less surface area and higher utilization of the eFPGA. We can also offer different types of power gating to lower the power even further. By proving a fully hardened design, we simplify closing timing for the customer and simplify their integration of the eFPGA.
So the next time you want to reduce costs and power in your system, consider incorporating eFPGA. And for the most power savings and ease of integration, consider EFLX eFPGAs from Flex Logix.
Andy Jaros is vice president of sales and marketing at Flex Logix.