IBM’s 3D chip stack process could revive a famous rule about computing power

IBM Research and Tokyo Electron (TEL) collaborated on a new breakthrough in creating 3D chips that uses a new method to keep Moore’s law moving.

The two companies collaborated on a chipmaking innovation that simplifies the process of producing wafers using 3D chip stack technology, a press statement reveals.

They announced that they have successfully implemented the new process for producing 300mm silicon chip wafers for 3D chip stack technology. It is the world’s first 300mm level example of this technology.

New chip stacking process uses laser invisible to silicon

Stacking chips typically requires vertical connections between layers of silicon, called through-silicon vias (TSVs). The layers are usually extremely thin, with a thickness of less than 100 microns.

During the manufacturing process, each of these wafers is attached to a carrier wafer, which is usually made of glass temporarily bonded to the silicon. After the wafer has been processed, the glass support is then removed from the silicon using ultraviolet lasers.

The new process from IBM and TEL uses a 300mm module with an infrared laser that performs a debonding process. This process is transparent to silicon, meaning it is possible to use standard silicon wafers instead of glass wafers for the support. This means that silicon wafers can be bonded to other pieces of silicon, eliminating the need for glass carriers in the manufacturing process.

IBM and TEL aim to reduce global chip shortage

The researchers behind the new method think it can help to: relieve the tension on the global chip industry. “As the global chip shortage continues,” IBM’s statement reads, “we will likely need new ways to increase chip manufacturing capacity in the coming years. We hope our work will help increase the number of products needed in the semiconductor supply chain.” while also helping to improve processing power for years to come.”

IBM Research has been working with TEL on this new process since 2018, which it says should also cause fewer defects and process problems associated with uneven wafer pairs during production. Next, the partners want to further test their beta system to demonstrate how it can be implemented in the supply chain.

The global chip shortage was the result of skyrocketing demand and factory outages caused by Covid. But even before the pandemic, the computer chip industry felt the pressure. Moore’s law, which states that the number of transistors on a microchip will double every year, was delayed by: the physical limitations of silicon† Experts say the transistor is approaching the point where it is as small as possible and yet remains functional, causing some to sound the death knell for Moore’s law. As a reference point, IBM Research’s smallest chip node is 2 nanometers wide.

Chip stacking is usually only used in advanced operations such as high-bandwidth memory production. However, it has the potential to expand the number of transistors in a specific volume. Moore’s Law has traditionally focused on areas rather than volumes, meaning the new breakthrough allows for the continuation of Moore’s Law through a different interpretation of the famous 1965 observation. It may not be dead yet.

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